Pacific Northwest National Laboratory, Fordham University, the University of Washington and NASA Ames, on IBM’s ibm_phoenix; Quantinuum, on its Helios-1 trapped-ion processor (for scale)
1. Error correction you can rent
Researchers from Pacific Northwest National Laboratory, Fordham, the University of Washington and NASA Ames, with no IBM authors, ran a surface code on ibm_phoenix, a cloud IBM processor. From distance 3 to 6 in one direction, the logical error per round fell from 0.53% to 0.24% and from 0.52% to 0.22% in the two bases (Λ of 1.68 and 1.85). Over runs of up to 150 rounds, the bigger code’s advantage faded from about 2.4× to about 1.2×. It is a memory test, not a computation.
For scale, Quantinuum ran color-code memories of distance 3, 5 and 7 on its Helios-1 trapped-ion processor (arXiv 2610.24077). The logical error per round fell from about 5.5×10⁻⁴ to about 5×10⁻⁶, a suppression factor Λ of about 12 per step in distance. The paper notes that “all decoding in this work has been done offline,” and the distance-7 figure rests on three failures in 29,000 shots. Different code, machine and team: not a like-for-like race.
Λ sets how many physical qubits each logical qubit will cost, and a result outsiders can reproduce on rented hardware is a stronger signal than a vendor’s own run. For any error-correction claim: what was the suppression factor, over how many rounds, and with which decoder?
Demonstration of logical error suppression in a surface code memory on a cloud-accessible IBM superconducting processor ↗